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19 days agoNever did SPARC assembly, but ISTR their registers were basically a ring of groups of registers allowing fast context switches as long as the call depth stayed shallow (fsvo shallow). When the ring was exhausted, you had to stash away in memory.
The fact that x86. Hasn’t changed its foundation much, isn’t that just a combination of hardware making up for original design shortcomings, while economy keeping better solutions at bay? (Not a chip guy, I’m likely wrong.)